Li Battery SOC

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PlanB
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Li Battery SOC

Post by PlanB »

I'm puzzled by page 3. Figure 2 shows OCV hysteresis (different voltages for the same SOC depending on past history, ie charging or discharging). But none of the models seem to allow for this? How can they claim to calculate SOC from OCV if they don't take charge/discharge hysteresis into account? Also I'm surprised to see no temperature term in the models?

What do we know about polarisation resistance p18 [Edit: Preceding broken link replaced by https://forums.aeva.asn.au/download/file.php?id=1410]? That seems strongly correlated with SOC & has a temperature term. Could we not calculate polarisation resistance from OCV then have a lookup table to get the SOC?

Thoughts anybody?

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Post by Johny »

I have used OCV to track my pack health and SOC for 3 years now.
I only ever measure OCV after discharge and more than 1 hour rest.
Temperature is not relevant - at least between 5 and 40 degrees C.

We discussed it here (a few posts after the one I've linked has links to the articles I've collected):
viewtopic.php?title=memory-effect-found ... 416#p55028

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Post by coulomb »

PlanB wrote: I'm puzzled by page 3. Figure 2 shows OCV hysteresis (different voltages for the same SOC depending on past history, ie charging or discharging). But none of the models seem to allow for this?

It's not totally clear to me, but I think they're saying that the hysteresis is due to a lack of relaxation time, i.e. if you allow the cell to rest long enough, the hysteresis effectively fades away. They seem to suggest that in normal use, there is typically enough relaxation time to neglect the effects of hysteresis.

[ Edit: this is proved wrong below. ]
Last edited by coulomb on Sat, 20 Feb 2016, 05:22, edited 1 time in total.
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Post by PlanB »

OK so if you have to pick an opportune & consistent point in the charge/discharge cycle to read OCV (say relaxed after a full charge) to defeat OCV hysteresis, that means you only know SOC at that invariant point.

This is presumably why Weber is correcting OCV for internal resistance changes with temperature OCV estimation post, so he can read OCV (& infer SOC from it) under varying loads anytime?

I just don't understand how you can get away with that when the hysteresis is comparable to the OCV range between say 20% & 80% SOC?

[Edit: Moderator Weber changed the link to the page, and the time of posting:
[ URL=viewtopic.php?title=pip4048ms-inverter&t=4332&start=32 ]8:13pm post[ /URL ]
into to a direct link to the post:
[ URL=viewtopic.php?title=pip4048ms-inverter& ... 332#p59994 ]OCV estimation post[ /URL ]
because the time of posting appears different to people in different time zones.
A direct link to a post can be obtained by clicking on the blue bullet (sometimes a yellow star) at the top of the post.]
Last edited by weber on Tue, 16 Feb 2016, 10:37, edited 1 time in total.

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Post by weber »

Hi there hipster rhesus monkeys. Image

On page 2 of Weng et al we find:
"Although the close-to-equilibrium OCV curve shown in Fig. 2 may be affected by hysteresis and diffusion voltage due to lack of relaxation, it can sufficiently represent the generic electrochemical properties ..."

This tells me that hysteresis is different from diffusion voltage due to lack of relaxation. I believe that the hysteresis will stay the same no matter how long the battery is on holiday. So it must be taken into account in determining SoC from OCV.

Weng et al don't go into how to do that, but in the dataflow diagram on page 15 of Lu, if you Ctrl-+ zoom right in, you will see a block marked "Hypstesis Factor" [sic, hence my strange greeting above].

My post that you refer to, is not concerned with determining SoC in general, but only with determining high and low SoC cutoffs. In determining the 100% threshold I use the upper dashed line, since I know I will always have been charging prior to that, and in determining the 25% lower cutoff I use the lower dashed line since I know I will always have been discharging prior to that. i.e. the hysteresis is included in my threshold values.

Here's my understanding of polarisation resistance, based on http://www.fuelcellmarkets.com/content/ ... -final.pdf and other web research just now.

Total internal resistance is Ohmic resistance plus Polarisation resistance.

I think total internal resistance is what I measure when I apply a step change in load and wait long enough for the voltage to stabilise, but not long enough to appreciably change the state of charge, (a few seconds) and calculate deltaV / deltaI. It can also be measured by an AC impedance meter operating at 1 Hz or lower.

Ohmic resistance is the resistance measured by applying a step change in load and measuring the instantaneous step change in voltage (but averaging out any inductive ringing) and calculating deltaV / deltaI. It can also be measured by an AC impedance meter operating at 1 kHz to 10 kHz.

So Polarisation resistance is obtained as total internal resistance minus ohmic resistance. So it doesn't sound very practical as a method of SoC determination.

I was fascinated to learn more about the "Warburg element" in the equivalent circuit, that comes into play at sub-hertz frequencies. It sounds like a component used in Klingon technology. I call it a "semicapacitor". In complex-impedance terms it is mid-way between a resistor and a capacitor, but it cannot be made from a combination of the two. Like a capacitor its impedance increases as frequency decreases, but only half as rapidly -- ohms per root second instead of the ohms per second (inverse farads) of a capacitor. A Warburg element has current 45 degrees out of phase with voltage at all frequencies, while a capacitor has them 90 degrees out of phase. It arises from the diffusion of ions to an electrode. I think its circuit symbol should be like a capacitor symbol but with the "plates" slanted at 45 degrees to the leads.

Johny is right that between about 5 and 40 degrees, temperature has no significant effect on the relationship between rested OCV and SoC, at least for LiFePO4 cells.

As you guessed, I'm only using temperature in estimating internal resistance, so I can then estimate what the rested OCV would be, without actually resting.

Modelling hipster-rhesus looks fairly simple. Relative to the imaginary centre line, it's +-X mV at SoCs above 35% and +-Y mV at SoCs below 35%. The two references differ on what X and Y are. Lu shows them as about 10 and 20 mV, and Weng et al shows them as about 25 and 30 mV. You may have to do some measurements (or trial and error experiments) to determine what they are for your system.
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Post by PlanB »

Think I feel more like a lab rate in a battery metrics maze than an hysterical rhesus monkey Weber but I get your drift. Why 35% SOC as the transition point between the 2 different hysteresis corrections?

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Post by weber »

It just looks to me to be at about 35% SoC on both graphs (Lu and Weng) where the height of the hysterical band makes a fairly sudden change. I suppose you could morph between them gradually between about 30% and 40% if you wanted to do better. But it's probably not worth the trouble, since estimating SoC from voltage will still be incredibly inaccurate from about 35% to 95%.
Last edited by weber on Wed, 17 Feb 2016, 10:40, edited 1 time in total.
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Post by weber »

I finally struck gold on the question of hysteresis.
Battery Management Systems, Volume I: Battery Modeling by Gregory L. Plett.
See page 41.

It confirms that hysteresis does not go away merely with time, and it _must_ be modeled if you are to have any hope of estimating SoC from voltage.
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Post by PlanB »

Good grief SOC hysteresis and instantaneous (current reversal) hysteresis! What a great read though, esp that bit on dithering hysteresis away! And did I see a 'subspace' reference in there to go with your Klingon like Warburg element?

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